1. Field of the Invention
The present invention relates to a semiconductor memory device, and particularly to a semiconductor memory device of large capacity such as a semiconductor disk device employing a flash memory in which reading, writing and erasing are performed in block units, and employing a memory of a large capacity as a nonvolatile semiconductor memory for realizing high performance with reduction in manufacturing costs.
2. Description of the Prior Art
Examples of conventionally used nonvolatile semiconductor memories are, for instance, M5M29F25611VP manufactured by Mitsubishi Electric Corporation and HN29W25611 manufactured by Hitachi Ltd., which are flash memories performing read and write processes in block units of 2 k bytes. In a semiconductor memory device mounted with such a flash memory, the flash memory includes a plurality of blocks each of which are of 2 k bytes as illustrated in FIG. 7 for enabling parallel processing of data transmission to/from the host terminal and data transmission to/from the flash memory, wherein each of two buffer RAMs (R1, R2) has a capacity size corresponding to a single block.
In a conventional semiconductor memory device as illustrated in FIG. 7, the capacity of each buffer RAM corresponds to a capacity size of a single block, that is, an integer multiple of a single sector size (e.g. corresponding to four sector sizes in the figure).
Transmission of data between the host terminal and the buffer RAM and transmission of data between the flash memory and the buffer RAM are performed in a manner that separate buffer RAMs are respectively selected between the two buffer RAMs (R1, R2), wherein when data is sent and received between either one buffer RAM (e.g. R1) and the host terminal, data is sent and received between the other buffer RAM (e.g. R2) and the flash memory.
Transmission of data between the buffer RAM and the host terminal and between the buffer RAM and the flash memory is performed in a manner that data of a plurality of sectors corresponding to a single block is transmitted in one lump sum, and commands for the flash memory are issued in blocks (i.e. in a unit of four sectors).
FIG. 7A is a schematic view illustrating a conventional operation of reading data from the flash memory to the host terminal, and FIG. 7B is a schematic view illustrating a conventional operation of writing data from the host terminal to the flash memory, wherein the flash memory is comprised of a plurality of blocks each of which has a block size of 2 k bytes (i.e., four sector sizes).
In the operation for reading data from the flash memory as illustrated in FIG. 7A, transmission of data as indicated by a broken-line arrow indicates that data of a single block is preliminarily read from the flash memory and stored in one buffer RAM, i.e., buffer RAM (R1), and then both transmissions of data as indicated by solid-line arrows are simultaneously performed. In other words, simultaneously with reading out the data which are preliminarily stored in the buffer RAM (R1) from the buffer RAM (R1) and transmitting the same to the host, data of next block are read out from the flash memory and transmitted to the other buffer RAM (R2) to be stored therein.
Similarly, in performing an operation of writing data to the flash memory from the host terminal as illustrated in FIG. 7B, transmission of data as indicated by a broken-line arrow indicates that data of a single block are preliminarily stored in one buffer RAM (R1) from the host, and then both transmissions of data as indicated by the solid-line arrows are simultaneously performed. In other words, simultaneously with reading out data which are preliminarily stored in the buffer RAM (R1) and transmitting the same to the flash memory, data of next block are transmitted from the host terminal and transferred to the other buffer RAM (R2) to be stored therein.
Japanese Patent Unexamined Laid-open Publication No. 64-74649 (1989) discloses a technique related to a magnetic disk device comprising two buffer memories respectively of a capacity corresponding to a plurality of sectors, wherein data of a single sector is read out and stored in one buffer memory, and data of another sector is read and stored in the other buffer memory during transmission of the data. In this publication, however, the reason for providing two buffer memories each having a capacity corresponding to a plurality of sectors, is to simplify analysis of breakdowns by keeping hysteresis of transmitted data.
In the general conventional arrangements, since each of buffer RAMs has a capacity of a plurality of sectors, the capacity of the buffer memories becomes large. Therefore, it would be necessary to provide buffer RAMs of large structure when the capacities of flash memories further increase in future to have large block sizes of 4 k bytes or 8 k bytes and so on. Thus, increases in costs of the entire device including controllers and other members are unavoidable.
In case read commands or write commands are executed in each buffer size while these buffer sizes remained small, an overhead is excessively added for executing the command, resulting in a drawback that the efficiency is lowered and further that writing and reading speeds with respect to the host terminal side are delayed.
The present invention has been made for the purpose of solving the problems, and it is an object thereof to provide a semiconductor memory device in which the size of each of the buffer RAMs is decreased to correspond to a single sector size, which can be manufactured at low costs, which is capable of performing rapid transmission and rapid processing of writing and reading data, and further to provide a method for reading and writing thereof.
It is another object of the present invention to provide a semiconductor memory device capable of exhibiting the above performances with which it is possible to improve reliability of data by performing error correction.
In order to achieve the above-mentioned objectives, the present invention provides a semiconductor memory device which is connected to a host terminal through a system bus for data transmission. The semiconductor memory device comprises: a nonvolatile semiconductor memory having a structure of a plurality of blocks, wherein read and write commands are executed in block units, with a capacity size of a single block being an integer multiple of a single sector size corresponding to a processing unit of the host terminal for reading and writing data; a first buffer memory and a second buffer memory for mediation of data transmission between the host terminal and the nonvolatile semiconductor memory, each of the first and second buffer memories having a capacity corresponding to a single sector size of the nonvolatile semiconductor memory, and a controller for controlling data transmission in sector units between the host terminal and the buffer memories and between the nonvolatile memory and the buffer memories by alternately selecting the first and second buffer memories, and when one of the buffer memories performs transmission of data corresponding to one sector with the host terminal, the other buffer memory simultaneously performs transmission of data corresponding to another sector with the nonvolatile semiconductor memory.
The controller generates control signals to apply a read and write command with respect to a block of the nonvolatile semiconductor memory in response to a request for reading and writing data from the host terminal, and wherein transmission of data between the host terminal and the nonvolatile semiconductor memory is sequentially performed via the buffer memories every sector data.
The controller is adapted to maintain control levels of the control signals for the nonvolatile semiconductor memory in a manner that, after transmission of a single sector data, transmission of another sector data is continued to thereby perform simultaneous and parallel data transmission.
With this arrangement, it is possible to reduce the capacity of the buffer memories to enable manufacture at low costs, and since it is further possible to perform parallel processing of transmission, rapid transmission can be realized from the host terminal. Moreover, since processes are performed with respect to the flash memory in block units, it is possible to perform rapid reading and writing and thus to shorten the processing time.
The semiconductor memory device according to another aspect of the present invention further comprises an error correcting unit for performing correction control of errors of data stored in the nonvolatile semiconductor memory, wherein redundant data for the error correction of each sector data may be arranged to immediately follow the sector data.
The error correcting unit may be arranged such that, when in a data reading operation from the nonvolatile semiconductor memory to the buffer memory, each sector data and redundant data are sent to the error correcting unit simultaneously and in parallel with the data reading, and when a correctable error is detected, the sector data stored in the buffer memory is corrected, and that, when in a data writing operation from the buffer memory to the nonvolatile semiconductor memory, each sector data is transferred to the error correcting unit simultaneously and in parallel with the data writing to produce redundant data which is transmitted to the nonvolatile semiconductor memory.
With this arrangement of additionally providing a means for controlling correction of errors in data, it is possible to improve reliability of data in addition to exhibiting the above effects.
According to further another aspect of the present invention, a method of reading out data from a flash memory which is connected to a host terminal through two buffer memories connected on a system bus for data transmission, comprises steps of: performing a read_open process by applying a read command and block address with respect to a target block; performing a read_sector process with respect to a sector number of a target sector to transmit data of the corresponding sector from the flash memory to one of the buffer memories; issuing a request for data transmission to the host terminal; transmitting the data from one of the buffer memories to the host terminal upon receipt of the request; and performing a read_close process to close the block processing when the sector number is larger than a predetermined block size, wherein when one of the buffer memories performs transmission of data corresponding to a single sector with respect to the host terminal, the other buffer memory simultaneously performs transmission of data corresponding to another single sector with respect to the flash memory.
A method of writing data to a flash memory from a host terminal through two buffer memories, comprises the steps of: performing a write_open process by applying a write command and block address with respect to a target block issuing a request for data transmission to the host terminal; upon receipt of the request, sending the data to be written from the host terminal to one of the buffer memories; performing a write_sector process to transmit a target sector data from one of the buffer memories to the flash memory; and performing a write close process to close a block process when the sector number is larger than a predetermined block size value, wherein when one of the buffer memories performs transmission of data corresponding to a single sector with respect to the host terminal, the other buffer memory simultaneously performs transmission of data corresponding to another single sector with respect to the flash memory.
According to the methods of reading and writing data from and to the nonvolatile semiconductor memory, it is possible to decrease the capacity of the buffer memories to reduce manufacturing costs, and since it is further possible to perform parallel processing of transmission, rapid transmission can be realized from the host terminal. Moreover, since processes are performed with respect to the flash memory in block units, it is possible to perform rapid reading and writing and thus to shorten the processing time.